82583V Datasheet, PDF (321/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

Programing Interface—82583V GbE Controller
10.1.5.2.1.5 Correctable Error Status, Offset 0x10
The Correctable Error Status register reports error status of individual correctable error
sources on a PCIe device. When an individual error status bit is set to 1b it indicates
that a particular error occurred. Software might clear an error status by writing a 1b to
the respective bit.
Bit Location Attribute
0
5:1
6
7
8
11:9
12
13
15:14
R/W1CS
RO
R/W1CS
R/W1CS
R/W1CS
RO
R/W1CS
R/W1CS
RO
Default Value
Description
0b
Receiver Error Status.
0b
Reserved.
0b
Bad TLP Status.
0b
Bad DLLP Status.
0b
REPLAY_NUM Rollover Status.
0b
Reserved.
0b
Replay Timer Timeout Status.
0b
Advisory Non Fatal Error Status.
0b
Reserved.
10.1.5.2.1.6 Correctable Error Mask, Offset 0x14
The Correctable Error Mask register controls reporting of individual correctable errors
by device to the host bridge via a PCIe error message. A masked error (respective bit
set in mask register) is not reported to the host bridge by an individual device. There is
a mask bit per bit in the Correctable Error Status register.
Bit Location Attribute
0
5:1
6
7
8
11:9
12
13
15:14
RWS
RO
RWS
RWS
RWS
RO
RWS
RWS
RO
Default Value
0b
0b
0b
0b
0b
0b
0b
1b
0b
Description
Receiver Error Mask.
Reserved.
Bad TLP Mask.
Bad DLLP Mask.
REPLAY_NUM Rollover Mask.
Reserved.
Replay Timer Timeout Mask.
Advisory Non Fatal Error Mask.
Reserved.
10.1.5.2.1.7 First Error Pointer, Offset 0x18
The First Error Pointer is a read-only register that identifies the bit position of the first
uncorrectable error reported in the Uncorrectable Error Status register.
Bit Location Attribute
3:0
RO
Default Value
Description
0b
Vector pointing to the first recorded error in the
Uncorrectable Error Status register.
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