82583V Datasheet, PDF (180/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

82583V GbE Controller—Power Management and Delivery
8.5
8.5.1
Note:
Note:
Wake Up
The 82583V supports two types of wake-up mechanisms:
• Advanced Power Management (APM) wake up
• PCIe power management wake up
The PCIe power management wake up uses the PE_WAKE_N pin to wake the system
up. The advanced power management wake up can be configured to use the
PE_WAKE_N pin as well.
Advanced Power Management Wake Up
Advanced power management wake up, or APM wake up, was previously known as
wake on LAN. It is a feature that has existed in the 10/100 Mb/s NICs for several
generations. The basic premise is to receive a broadcast or unicast packet with an
explicit data pattern, and then to assert a signal to wake up the system. In the earlier
generations, this was accomplished by using special signal that ran across a cable to a
defined connector on the motherboard. The NIC would assert the signal for
approximately 50 ms to signal a wake up. The 82583V uses (if configured to) an in-
band PM_PME message for this.
At power up, the 82583V reads the APM Enable bits from the NVM Initialization Control
Word 2 into the APM Enable (APME) bits of the WUC. These bits control enabling of APM
wake up.
When APM wake up is enabled, the 82583V checks all incoming packets for Magic
Packets. See Section 8.5.3.1.4 for a definition of Magic Packets.
Once the 82583V receives a matching wake-up packet, it:
• If the Assert PME On APM Wakeup (APMPME) bit is set in the WUC:
— Sets the PME_Status bit in the PMCSR and issues a PM_PME message (in some
cases, this might require asserting the PE_WAKE_N signal first to resume
power and clock to the PCIe interface).
• Stores the first 128 bytes of the packet in the WUPM.
• Sets the relevant <wake up packet type> received bit in the WUS.
The 82583V maintains the first wake-up packet received in the WUPM until the
software device driver writes a 1b to the Magic Packet Received MAG bit in the WUS.
The WUPM latches on the first wake-up packet. Subsequent wake-up packets are not
saved until the programmer writes 1b to the relevant bit in the WUS. The best course of
action is to write a 1b to ALL of the WUC's bits, for example, set WUC = 0xFFFFFFFF.
Full power-on reset also clears the WUC.
APM wake up is supported in all power states and only disabled if a subsequent NVM
read results in the APM Wake Up bit being cleared or software explicitly writes a 0b to
the APM Wake Up (APM) bit of the WUC register.
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