82583V Datasheet, PDF (262/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

82583V GbE Controller—Driver Programing Interface
9.2.7.35 Receive Fragment Count - RFC (0x040A8; R)
9.2.7.36
Field
RFC
Bit(s)
31:0
Initial
Value
0x0
Description
Number of receive fragment errors.
This register counts the number of received frames that passed address filtering, and
were less than minimum size (64 bytes from <Destination Address> through <CRC>,
inclusively), but had a bad CRC (this is slightly different from the Receive Undersize
Count register). This register only increments if receives are enabled.
Receive Oversize Count - ROC (0x040AC; R)
Note:
9.2.7.37
Field
ROC
Bit(s)
31:0
Initial
Value
0x0
Description
Number of receive oversize errors.
This register counts the number of received frames that passed address filtering, and
were greater than maximum size. Packets over 1522 bytes are oversized if LPE is 0b.
The 82583V does not support setting LPE to 1b.
If receives are not enabled, this register does not increment. These lengths are based
on bytes in the received packet from <Destination Address> through <CRC>,
inclusively.
Receive Jabber Count - RJC (0x040B0; R)
Note:
Field
RJC
Bit(s)
31:0
Initial
Value
0x0
Description
Number of receive jabber errors.
This register counts the number of received frames that passed address filtering, and
were greater than maximum size and had a bad CRC (this is slightly different from the
Receive Oversize Count register).
Packets over 1522 bytes are oversized if LPE is 0b.
The 82583V does not support setting LPE to 1b.
If receives are not enabled, this register does not increment. These lengths are based
on bytes in the received packet from <Destination Address> through <CRC>,
inclusively.
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