82583V Datasheet, PDF (219/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

Driver Programing Interface—82583V GbE Controller
9.2.3.4
3GIO Statistic Control Registers #2- GSCL_2 (0x05B14; RW)
9.2.3.5
Field
Bit(s)
GIO_EVENT_
NUM_3
GIO_EVENT_
NUM_2
GIO_EVENT_
NUM_1
GIO_EVENT_
NUM_0
31:24
23:16
15:8
7:0
Initial
Value
0x0
0x0
0x0
0x0
Description
The event number that counter 3 counts
The event number that counter counts
The event number that counter counts
The event number that counter counts
This counter contains the mapping of the event (which counter counts what event).
3GIO Statistic Control Register #3 - GSCL_3 (0x05B18; RW)
9.2.3.6
Field
Bit(s)
GIO_FC_TH_0 11:0
RESERVED
15:12
GIO_FC_TH_1 27:16
RESERVED
31:28
Initial
Value
0x0
0x0
0x0
0x0
Description
Threshold of flow control credits.
Optional values: 0 = (256-1).
Reserved
Threshold of flow control credits.
Optional values: 0 = (256-1).
Reserved
This counter holds the threshold values needed for some of the event counting. Note
that the event increases only after the value passes the threshold boundary.
3GIO Statistic Control Register #4 - GSCL_4 (0x05B1C; RW)
9.2.3.7
9.2.3.8
9.2.3.9
Field
Bit(s)
RESERVED
31:16
GIO_RB_TH 15:10
HOST_COML_
TH
9:0
Initial
Value
0x0
0x0
0x0
Description
Reserved
Retry buffer threshold.
Completions latency threshold.
This counter holds the threshold values needed for some of the event counting. Note
that the event increases only after the value passes the threshold boundary.
3GIO Statistic Counter Registers #0 - GSCN_0 (0x05B20; RW)
3GIO Statistic Counter Registers #1- GSCN_1 (0x05B24; RW)
3GIO Statistic Counter Registers #2- GSCN_2 (0x05B28; RW)
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