82583V Datasheet, PDF (280/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

82583V GbE Controller—Driver Programing Interface
Bits
Field
Mode HW Rst
MDI
6:5
Crossover R/W 0x3
Mode
4
Reserved
R/W 0x0
Copper
3
Transmitter R/W 0x0
Disable
2
Power
Down
R/W 0x0
Polarity
1
Reversal
R/W 0x0
Disable
0
Disable
Jabber
R/W 0x0
SW Rst
Description
Update
Retain
Changes to these bits are disruptive to the normal
operation; therefore, any changes to these registers
must be followed by a software reset to take effect.
00b = Manual MDI configuration.
01b = Manual MDIX configuration.
10b = Reserved.
11b = Enable automatic crossover for all modes.
Reserved, write as 0x0.
Retain
1b = Transmitter disable.
0b = Transmitter enable.
Retain
Retain
Retain
Power down is controlled via register 0.11 and
16_0.2.
Both bits must be set to 0b before the PHY
transitions from power down to normal operation.
When the port is switched from power down to
normal operation, a software reset and restart auto-
negotiation are done even when bits Reset (0_15)
and Restart Auto-Negotiation (0.9) are not set by
the user.
IEEE power down shuts down the 82583V except for
the GMII interface if 16_2.3 is set to 1b. If 16_2.3 is
set to 0b, then the GMII interface also shuts down.
1b = Power down.
0b = Normal operation.
If polarity is disabled, then the polarity is forced to
be normal in 10BASE-T.
1b = Polarity reversal disabled.
0b = Polarity reversal enabled.
The detected polarity status is shown in Register
17_0.1 or in 1000BASE-T mode, 21_5.3:0.
Jabber has affect only in 10BASE-T half-duplex
mode.
1b = Disable jabber function.
0b = Enable jabber function.
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