82583V Datasheet, PDF (349/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

Design Considerations—82583V GbE Controller
11.8.4
Landing Pattern B (Thermal Relief; No Via In Pad)
This landing pattern (vias outside Exposed Pad*) provides thermal relief, adequate
solder coverage, and less solder voiding; however, it does not provide an extended
ground connection. This landing pattern also meets Intel’s recommendation for
coverage >= 80%.
thermal relief
8-spoke pattern
40 mil mimimum
44 mil anti-pad
32 mil via pad
10 mil finished hole (small via)
14 to 20 mil finished hole (large thermal via)
Figure 65.
82583V Landing Pattern B (Top View - Vias on the Outside of the Exposed
Pad*)
Intel recommends using 16 vias evenly placed (as shown in Figure 65) around the
extended ground connection. Additional vias can be added to improve conductivity. A
minimum of 12 larger vias (14 to 20 mil finished hole size) can also be used.
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