82583V Datasheet, PDF (295/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

Driver Programing Interface—82583V GbE Controller
9.2.8.32
1000 BASE-T Pair Skew Register (Page 5), PHY Address 01; Register
20
9.2.8.33
Bits
Field
15:12
Pair 7,8
(MDI[3]±)
11:8
7:4
3:0
Pair 4,5
(MDI[2]±)
Pair 3,6
(MDI[1]±)
Pair 1,2
(MDI[0]±)
Mode HW Rst SW Rst
Description
Skew = bit value times 8 ns. The value is correct to
RO
0x0
0x0
within ± 8 ns. The contents of 20_5.15:0 are valid only if
register 21_5.6 = 1b.
RO
0x0
0x0
Skew = bit value times 8 ns. The value is correct to
within ± 8 ns.
RO
0x0
0x0
Skew = bit value times 8 ns. The value is correct to
within ± 8 ns.
RO
0x0
0x0
Skew = bit value times 8 ns. The value is correct to
within ± 8 ns.
1000 BASE-T Pair Swap and Polarity (Page 5), PHY Address 01;
Register 21
9.2.8.34
Bits
Field
Mode HW Rst SW Rst
Description
15:7 Reserved
RO
6
Register 20_5 And
21_5 Valid
RO
5
C, D Crossover
RO
4
A, B Crossover
RO
3
Pair 7,8 (MDI[3]±)
Polarity
RO
2
Pair 4,5 (MDI[2]±)
Polarity
1
Pair 3,6 (MDI[1]±)
Polarity
RO
0
Pair 1,2 (MDI[0]±)
Polarity
RO
0x000
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x000
0x0
0x0
0x0
0x0
0x0
0x0
0x0
The contents of 21_5.5:0 and 20_5.15:0 are valid
only if register 21_5.6 = 1b.
1b = Valid.
0b = Invalid.
1b = Channel C received on MDI[2]± Channel D
received on MDI[3]±.
0b = Channel D received on MDI[2]± Channel C
received on MDI[3]±.
1b = Channel A received on MDI[0]± Channel B
received on MDI[1]±.
0b = Channel B received on MDI[0]± Channel A
received on MDI[1]±.
1b = Negative.
0b = Positive.
1b = Negative.
0b = Positive.
1b = Negative.
0b = Positive.
1b = Negative.
0b = Positive.
CRC Counters (Page 6), PHY Address 01; Register 17
Bits
Field
Mode HW Rst SW Rst
Description
15:8
CRC Packet
Count
RO
7:0
CRC Error
Count
RO
0x00
0x00
Retain
Retain
0x00 = No packets received.
0xFF = 256 packets received (maximum count). Bit
16_6.4 must be set to 1b in order for the register to be
valid.
0x00 = no CRC errors detected in the packets received.
0xFF = 256 CRC errors detected in the packets received
(maximum count). Bit 16_6.4 must be set to 1b in order
for the register to be valid.
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