82583V Datasheet, PDF (182/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

82583V GbE Controller—Power Management and Delivery
8.5.3.1
8.5.3.1.1
.
8.5.3.1.2
Pre-Defined Filters
The following packets are supported by the 82583V's pre-defined filters:
• Directed packet (including exact, multicast indexed, and broadcast)
• Magic Packet*
• ARP/Ipv4 request packet
• Directed IPv4 packet
• Directed IPv6 packet
Each of these filters are enabled if the corresponding bit in the WUFC is set to 1b.
The explanation of each filter includes a table showing which bytes at which offsets are
compared to determine if the packet passes the filter. Both VLAN frames and LLC/SNAP
can increase the given offsets if they are present.
Directed Exact Packet
The 82583V generates a wake-up event upon receipt of any packet whose destination
address matches one of the 16 valid programmed receive addresses if the Directed
Exact Wake Up Enable bit is set in the Wake Up Filter Control Register (WUFC.EX).
Offset
# of
bytes
Field
0
6
Destination Address
Value
Action
Compare
Comment
Match any pre-
programmed address
Directed Multicast Packet
For multicast packets, the upper bits of the incoming packet's destination address index
a bit vector, the Multicast Table Array that indicates whether to accept the packet. If the
Directed Multicast Wake Up Enable bit set in the Wake Up Filter Control Register
(WUFC.MC) and the indexed bit in the vector is one then the 82583V generates a wake-
up event. The exact bits used in the comparison are programmed by software in the
Multicast Offset field of the Receive Control Register (RCTL.MO).
8.5.3.1.3
Offset
0
# of
bytes
6
Field
Destination Address
Value
Action
Compare
Comment
See above paragraph.
Broadcast
If the Broadcast Wake Up Enable bit in the Wake Up Filter Control Register (WUFC.BC)
is set, the 82583V generates a wake-up event when it receives a broadcast packet.
Offset
0
# of
bytes
6
Field
Destination Address
Value
0xFF*6
Action
Compare
Comment
182