82583V Datasheet, PDF (226/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

82583V GbE Controller—Driver Programing Interface
Software can use this register to prevent the condition of repeated, closely spaced,
interrupts to the host CPU, asserted by the 82583V, by guaranteeing a minimum delay
between successive interrupts.
To independently validate configuration settings, software can use the following
algorithm to convert the inter-interrupt interval value to the common interrupts/sec
performance metric:
interrupts/sec = (256 x 10^-9sec x interval)-1
For example, if the interval is programmed to 500 (decimal), the 82583V guarantees
the CPU is not interrupted by it for 128 μs from the last interrupt. The maximum
observable interrupt rate from the 82583V should never exceed 7813 interrupts/sec.
Inversely, inter-interrupt interval value can be calculated as:
inter-interrupt interval = (256 x 10^-9sec x interrupts/sec) -1
The optimal performance setting for this register is very system and configuration
specific. An initial suggested range is 651- 5580 decimal (or 0x28B - 0x15CC).
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