82583V Datasheet, PDF (162/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

82583V GbE Controller—Inline Functions
The following algorithm converts the inter-interrupt interval value to the common
'interrupts/sec' performance metric:
Interrupts/sec = (256 * 10^-9 sec x interval) -1
For example, if the interval is programmed to 500d, the 82583V guarantees the CPU is
not interrupted by it for at least 128 μs from the last interrupt.
Inversely, inter-interrupt interval value can be calculated as:
Inter-interrupt interval = (256 * 10^-9 sec x interrupts/sec) -1
The optimal performance setting for this register is very system and configuration
specific.
ITR rules:
• The maximum observable interrupt rate from the adapter should not exceed 7813
interrupts/sec.
• The Extended Interrupt Throttle register should default to 0x0 upon initialization
and reset.
Each time an interrupt event happens, the corresponding bit in the ICR is activated.
The interrupt flow should follow the following diagram:
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