82583V Datasheet, PDF (222/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

82583V GbE Controller—Driver Programing Interface
Transaction layer Events
Event
Mapping
(Hex)
Transaction layer stalls transmitting due
to lack of flow control credits of the next 27
part.
Retransmitted packets.
28
Stall due to retry buffer full
29
Retry buffer is under threshold
2A
Posted Request Header (PRH) flow
control credits (of the next part) below 2B
threshold
Posted Request Data (PRD) flow control
credits (of the next part) below
2C
threshold
Non-Posted Request Header (NPRH)
flow control credits (of the next part)
2D
below threshold
Completion Header (CPLH) flow control
credits (of the next part) below
2E
threshold
Completion Data (CPLD) flow control
credits (of the next part) below
2F
threshold
Posted Request Header (PRH) flow
control credits (of local part) get to
30
zero.
Non-Posted Request Header (NPRH)
flow control credits (of local part) get to 31
zero.
Posted Request Data (PRD) flow control
credits (of local part) get to zero.
32
Non-Posted Request Data (NPRD) flow
control credits (of local part) get to
33
zero.
Dwords of TLP received, include payload
and header.
34
Messages packets received
35
Received packets to func_logic.
36
Description
The counter counts the number of times the
transaction layer stops transmitting because of this
(per packet).
Counted: completion, memory, message.
The counter increases for each re-transmitted
packet.
Counted: completion, memory, message.
The counter counts the number of times transaction
layer stops transmitting because the retry buffer is
full (per packet).
Counted: completion, memory, message.
Threshold specified by software, Retry buffer is under
threshold per packet.
Counted: completion, memory, message.
Threshold specified by software.
The counter increases each time the number of the
specific flow control credits is lower than the
threshold.
Counted: According to credit type.
Threshold specified by software.
The counter increases each time the number of the
specific flow control credits reaches the value of zero.
(The period that the credit is zero is not counted).
Counted: According to credit type.
Each 125 MHz cycle the counter increases by 1 (1
Dword) or 2 (2 Dwords).
Counted: completion, memory, message, I/O, config.
Each 125 MHz cycle the counter increases by 1.
Counted: messages (only good).
Each 125 MHz cycle the counter increases by 1.
Counted: memory, I/O, config (only good).
222