82583V Datasheet, PDF (6/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

82583V GbE Controller—Datasheet
9.2 Configuration and Status Registers - CSR Space .................................................. 192
9.2.1 Register Summary Table........................................................................ 192
9.2.2 General Register Descriptions ................................................................. 197
9.2.3 PCIe Register Descriptions ..................................................................... 216
9.2.4 Interrupt Register Descriptions ............................................................... 224
9.2.5 Receive Register Descriptions ................................................................. 230
9.2.6 Transmit Register Descriptions ............................................................... 245
9.2.7 Statistic Register Descriptions ................................................................ 252
9.2.8 PHY Registers....................................................................................... 267
9.2.9 Diagnostic Register Descriptions ............................................................. 296
10.0 Programing Interface............................................................................................. 302
10.1 PCIe Configuration Space.................................................................................. 302
10.1.1 PCIe Compatibility ................................................................................ 302
10.1.2 Mandatory PCI Configuration Registers .................................................... 303
10.1.3 PCI Power Management Registers ........................................................... 308
10.1.4 Message Signaled Interrupt (MSI) Configuration Registers.......................... 311
10.1.5 PCIe Configuration Registers .................................................................. 312
11.0 Design Considerations ........................................................................................... 324
11.1 PCIe .............................................................................................................. 324
11.1.1 Port Connection to the 82583V ............................................................... 324
11.1.2 PCIe Reference Clock ............................................................................ 324
11.1.3 Other PCIe Signals................................................................................ 324
11.1.4 PCIe Routing ........................................................................................ 325
11.2 Clock Source ................................................................................................... 325
11.2.1 Frequency Control Device Design Considerations....................................... 325
11.2.2 Frequency Control Component Types....................................................... 325
11.3 Crystal Support ............................................................................................... 327
11.3.1 Crystal Selection Parameters .................................................................. 327
11.3.2 Crystal Placement and Layout Recommendations ...................................... 330
11.4 Oscillator Support ............................................................................................ 331
11.4.1 Oscillator Placement and Layout Recommendations ................................... 332
11.5 Ethernet Interface ........................................................................................... 333
11.5.1 Magnetics for 1000 BASE-T .................................................................... 333
11.5.2 Magnetics Module Qualification Steps ...................................................... 333
11.5.3 Third-Party Magnetics Manufacturers ....................................................... 333
11.5.4 Designing the 82583V as a 10/100 Mb/s Only Device ................................ 334
11.5.5 Layout Considerations for the Ethernet Interface....................................... 335
11.5.6 Physical Layer Conformance Testing ........................................................ 341
11.5.7 Troubleshooting Common Physical Layout Issues ...................................... 341
11.6 82583V Power Supplies .................................................................................... 342
11.6.1 82583V GbE Controller Power Sequencing................................................ 342
11.6.2 Power and Ground Planes ...................................................................... 344
11.7 Device Disable................................................................................................. 345
11.7.1 BIOS Handling of Device Disable ............................................................. 345
11.8 82583V Exposed Pad* ...................................................................................... 346
11.8.1 Introduction ......................................................................................... 346
11.8.2 Component Pad, Solder Mask and Solder Paste ......................................... 346
11.8.3 Landing Pattern A (No Via In Pad) ........................................................... 348
11.8.4 Landing Pattern B (Thermal Relief; No Via In Pad)..................................... 349
11.9 Assembly Process Flow ..................................................................................... 350
11.10 Reflow Guidelines ............................................................................................ 350
11.11 XOR Testing .................................................................................................... 352
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