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82583V Datasheet, PDF (249/374 Pages) Intel Corporation – Intel® 82583V GbE Controller
Driver Programing Interface—82583V GbE Controller
Note:
9.2.6.8
This register’s address has been moved from where it was located in previous devices.
However, for backwards compatibility, this register can also be accessed at its alias
offset of 0x00430.
Transmit Descriptor Tail - TDT (0x03818; RW)
Note:
9.2.6.9
Field
TDT
Reserved
Bit(s)
15:0
31:16
Initial
Value
0x0
0x0
Description
Transmit Descriptor Tail
Reads as 0. Should be written to 0 for future compatibility.
This register contains the tail pointer for the transmit descriptor ring. It points to a 16-
byte datum. Software writes the tail pointer to add more descriptors to the transmit
ready queue. Hardware attempts to transmit all packets referenced by descriptors
between head and tail.
This register’s address has been moved from where it was located in previous devices.
However, for backwards compatibility, this register can also be accessed at its alias
offset of 0x00438.
Transmit Arbitration Count - TARC (0x03840; RW)
9.2.6.10
Field
Reserved
Reserved
ENABLE
Reserved
Reserved
Reserved
Bit(s)
6:0
9:7
10
26:11
30:27
31
Initial
Value
0x3
0b
1b
0x0
0000b
0b
Description
Reserved
Writing 0x0 to this register is not allowed.
Reserved
Descriptor Enable
The Enable bit of transmit queue 0 should always be set.
Reserved, reads as 0. Should be written to 0 for future compatibility.
Reserved
Reads as 0b. Should be written to 0b for future compatibility.
Transmit Interrupt Delay Value - TIDV (0x03820; RW)
Field
IDV
Reserved
FPD
Bit(s)
15:0
30:16
31
Initial
Value
0x0
0x0
0b
Description
Interrupt Delay Value
Counts in units of 1.024 microseconds. A value of 0 is not allowed.
Reads as 0x0. Should be written to 0x0 for future compatibility.
Flush Partial Descriptor Block
When set to 1b, ignored. Reads as 0b.
This register is used to delay interrupt notification for transmit operations by coalescing
interrupts for multiple transmitted buffers. Delaying interrupt notification helps
maximize the amount of transmit buffers reclaimed by a single interrupt. This feature
ONLY applies to transmit descriptor operations where:
1. Interrupt-based reporting is requested (RS set).
2. The use of the timer function is requested (IDE is set).
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