82583V Datasheet, PDF (254/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

82583V GbE Controller—Driver Programing Interface
9.2.7.5
Single Collision Count - SCC (0x04014; R)
9.2.7.6
Field
SCC
Bit(s)
31:0
Initial
Value
0x0
Description
Number of times a transmit encountered a single collision.
This register counts the number of times that a successfully transmitted packet
encountered a single collision. This register only increments if transmits are enabled
and the device is in half-duplex mode.
Excessive Collisions Count - ECOL (0x04018; R)
9.2.7.7
Field
ECC
Bit(s)
31:0
Initial
Value
0x0
Description
Number of packets with more than 16 collisions.
When 16 or more collisions have occurred on a packet, this register increments,
regardless of the value of collision threshold. If collision threshold is set below 16, this
counter won’t increment. This register only increments if transmits are enabled and the
device is in half-duplex mode.
Multiple Collision Count - MCC (0x0401C; R)
9.2.7.8
Field
MCC
Bit(s)
31:0
Initial
Value
0x0
Description
Number of times a successful transmit encountered multiple
collisions.
This register counts the number of times that a transmit encountered more than one
collision but less than 16. This register only increments if transmits are enabled and the
device is in half-duplex mode.
Late Collisions Count - LATECOL (0x04020; R)
Field
LCC
Bit(s)
31:0
Initial
Value
0x0
Description
Number of packets with late collisions.
Late collisions are collisions that occur after one slot time. This register only increments
if transmits are enabled and the device is in half-duplex mode.
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