82583V Datasheet, PDF (188/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

82583V GbE Controller—Driver Programing Interface
9.0
Driver Programing Interface
9.1
Table 48.
Introduction
This chapter details the programmer visible state inside the 82583V. In some cases, it
describes hardware structures invisible to software in order to clarify a concept.
The 82583V's address space is mapped into four regions. These regions are listed in
Table 48:
82583V Address Space
Addressable Content
Internal registers and memories
Flash (optional)
Expansion ROM (optional)
Internal registers and memories, Flash (optional)
How Mapped
Direct memory mapped
Direct memory-mapped
Direct memory-mapped
I/O window mapped
Size of Region
128 KB
64 KB-16 MB
2 KB-256 KB
32 bytes
9.1.1
9.1.1.1
9.1.1.2
9.1.1.3
Both the Flash and Expansion ROM Base Address Registers (BARs) map the same Flash
memory.
The internal registers, memories, and Flash can be accessed though I/O space
indirectly, as explained in the sections that follow.
Memory and I/O Address Decoding
Memory-Mapped Access to Internal Registers and Memories
The internal registers and memories can be accessed as direct memory-mapped offsets
from the Base Address Register 0 (BAR0). The appropriate offset for each specific
internal register is described in this section.
Memory-Mapped Access to Flash
The external Flash can be accessed using direct memory-mapped offsets from the Flash
Base Address Register 1 (BAR1). The Flash is only accessible if enabled through the
NVM Initialization Control Word, and if the Flash BAR1 contains a valid (non-zero) base
memory address. For accesses, the offset from the Flash BAR1 corresponds to the
offset into the Flash actual physical memory space.
Memory-Mapped Access to Expansion ROM
The external Flash can also be accessed as a memory-mapped expansion ROM.
Accesses to offsets starting from the Expansion ROM BAR reference the Flash, provided
that access is enabled through the NVM Initialization Control Word, and the Expansion
ROM BAR contains a valid (non-zero) base memory address.
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