82583V Datasheet, PDF (314/374 Pages) Intel Corporation – Intel® 82583V GbE Controller

82583V GbE Controller—Programing Interface
Bits
4:3
5
8:6
11:9
12
13
14
15
17:16
25:18
27:26
31:28
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Default
Description
00b
0b
011b
110b
0b
0b
0b
1b
00b
0x0
00b
0000b
Phantom Function Supported
Not supported by the 82583V.
Extended Tag Field Supported
Max supported size of the Tag field. The 82583V supports a 5-bit Tag field.
End-Point L0s Acceptable Latency
This field indicates the acceptable latency that the 82583V can withstand due
to the transition from L0s state to the L0 state. The value is loaded from the
NVM PCIe Init Configuration 1 word 0x18.
End-Point L1 Acceptable Latency
This field indicates the acceptable latency that the 82583V can withstand due
to the transition from L1 state to the L0 state. The value is loaded from the
NVM PCIe Init Configuration 1 word 0x18.
Attention Button Present
Hardwired in the 82583V to 0b.
Attention Indicator Present
Hardwired in the 82583V to 0b.
Power Indicator Present
Hardwired in the 82583V to 0b.
Role Based Error Reporting
Hardwired in the 82583V to 1b.
Reserved, set to 00b
Slot Power Limit Value
Used in upstream ports only. Hardwired in the 82583V to 0x00.
Slot Power Limit Scale
Used in upstream ports only. Hardwired in the 82583V to 0b.
Reserved
10.1.5.1.5
Device Control, Offset 0xE8, (RW)
This register controls PCIe specific parameters.
Bits
0
1
2
3
4
7:5
R/W
RW
RW
RW
RW
RW
RW
Default
Description
0b
0b
0b
0b
1b
000b (128
Bytes)
Correctable Error Reporting Enable
Enable error report.
Non-Fatal Error Reporting Enable
Enable error report.
Fatal Error Reporting Enable
Enable error report.
Unsupported Request Reporting Enable
Enable error report.
Enable Relaxed Ordering
If this bit is set, the device is permitted to set the Relaxed Ordering bit in the
attribute field of write transactions that do not need strong ordering. For
more details, also see register CTRL_EXT bit RO_DIS.
Max Payload Size
This field sets maximum TLP payload size for the device functions. As a
receiver, the device must handle TLPs as large as the set value. As a
transmitter, the device must not generate TLPs exceeding the set value.
The Maximum Payload Size supported in the Device Capabilities register
indicates permissible values that can be programmed.
314