HD6433044 Datasheet, PDF (86/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

4.1.3 Exception Vector Table
The exception sources are classified as shown in figure 4-1. Different vectors are assigned to
different exception sources. Table 4-2 lists the exception sources and their vector addresses.
Exception
sources
• Reset
• Interrupts
• Trap instruction
External interrupts: NMI, IRQ₀ to IRQ₅
Internal interrupts: 30 interrupts from on-chip
supporting modules
Figure 4-1 Exception Sources
Table 4-2 Exception Vector Table
Exception Source
Vector Number
Vector Address^*1
Reset
0
H'0000 to H'0003
Reserved for system use
1
H'0004 to H'0007
2
H'0008 to H'000B
3
H'000C to H'000F
4
H'0010 to H'0013
5
H'0014 to H'0017
6
H'0018 to H'001B
External interrupt (NMI)
7
H'001C to H'001F
Trap instruction (4 sources)
8
H'0020 to H'0023
9
H'0024 to H'0027
10
H'0028 to H'002B
11
H'002C to H'002F
External interrupt IRQ₀
12
External interrupt IRQ₁
13
External interrupt IRQ₂
14
External interrupt IRQ₃
15
External interrupt IRQ₄
16
External interrupt IRQ₅
17
Reserved for system use
18
H'0030 to H'0033
H'0034 to H'0037
H'0038 to H'003B
H'003C to H'003F
H'0040 to H'0043
H'0044 to H'0047
H'0048 to H'004B
19
H'004C to H'004F
Internal interrupts^*2
20
to
60
H'0050 to H'0053
to
H'00F0 to H'00F3
Notes: 1. Lower 16 bits of the address.
2. For the internal interrupt vectors, see section 5.3.3, Interrupt Vector Table.
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