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HD6433044 Datasheet, PDF (675/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer
Table 21-5 Refresh Controller Bus Timing
Condition A: VCC = 2.7 V to 5.5 V, AVCC = 2.7 V to 5.5 V, VREF = 2.7 V to AVCC,
VSS = AVSS = 0 V, ø = 1 MHz to 8 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition B: VCC = 3.15 V to 5.5 V, AVCC = 3.15 V to 5.5 V, VREF = 3.15 V to AVCC,
VSS = AVSS = 0 V, ø = 1 MHz to 13 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition C: VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, VREF = 4.5 V to AVCC,
VSS = AVSS = 0 V, ø = 1 MHz to 18 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition A Condition B
Condition C
8 MHz
13 MHz
16 MHz
18 MHz
Item
Symbol Min Max Min Max Min Max Min Max
RAS delay time 1
tRAD1 — 60 — 50 — 30 — 30
RAS delay time 2
tRAD2 — 60 — 50 — 30 — 30
RAS delay time 3
tRAD3 — 60 — 50 — 30 — 30
Row address hold time* tRAH
25 — 20 — 15 — 15 —
RAS precharge time* tRP
85 — 55 — 45 — 40 —
CAS to RAS precharge tCRP
time*
85 — 55 — 45 — 40 —
CAS pulse width
tCAS
100 — 55 — 40 — 35 —
RAS access time*
tRAC
— 160 — 80 — 85 — 70
Address access time tAA
— 105 — 45 — 55 — 45
CAS access time*
tCAC
— 50 — 30 — 30 — 25
Write data setup time 3 tWDS3 50 — 20 — 15 — 10 —
CAS setup time*
tCSR
20 — 10 — 15 — 10 —
Read strobe delay time tRSD
— 60 — 50 — 30 — 30
Note is on next page.
Test
Unit Conditions
ns Figure 21-10
to
Figure 21-16
667