HD6433044 Datasheet, PDF (583/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

18.5 Flash Memory Register Descriptions
18.5.1 Flash Memory Control Register
The flash memory control register (FLMCR) is an eight-bit register that controls the flash memory
operating modes. Transitions to program mode, erase mode, program-verify mode, and erase-
verify mode are made by setting bits in this register. FLMCR is initialized to H'00 by a reset, in
the standby modes, and when 12 V is not applied to V_PP. When 12 V is applied to V_PP, a reset or
entry to a standby mode initializes FLMCR to H'80.
Bit
7
6
5
V_PP
V_PP E
—
Initial value^* 0
0
0
R/W
R
R/W
—
4
3
2
1
0
—
EV
PV
E
P
0
0
0
0
0
—
R/W^* R/W^* R/W^* R/W^*
Program mode
Designates
transition to
or exit from
program mode
Erase mode
Designates transition
to or exit from erase
mode
Program-verify mode
Designates transition to
or exit from program-verify
mode
Erase-verify mode
Designates transition to
or exit from erase-verify
mode
Reserved bits
V_PP enable
Disables or enables 12-V
application to V_PP pin
Programming power
Status flag indicating the
power to V_PP
Note: * The initial value is H'00 in modes 5, 6, and 7 (on-chip flash memory enabled). In modes
1, 2, 3, and 4 (on-chip flash memory disabled), this register cannot be modified and is
always read as H'FF.
574