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HD6433044 Datasheet, PDF (289/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer
9.11 Port A
9.11.1 Overview
Port A is an 8-bit input/output port that is also used for output (TP7 to TP0) from the programmable
timing pattern controller (TPC), input and output (TIOCB2, TIOCA2, TIOCB1, TIOCA1, TIOCB0,
TIOCA0, TCLKD, TCLKC, TCLKB, TCLKA) by the 16-bit integrated timer unit (ITU), output
(TEND1, TEND0) from the DMA controller (DMAC), CS4 to CS6 output, and address output (A23
to A20). A reset or hardware standby leaves port A as an input port, except that in modes 3, 4, and
6, one pin is always used for A20 output. Usage of pins for TPC, ITU, and DMAC input and output
is described in the sections on those modules. For output of address bits A23 to A21 in modes 3, 4,
and 6, see section 6.2.5, Bus Release Control Register (BRCR). For output of CS4 to CS6 in modes
1 to 6, see section 6.3.2, Chip Select Signals. Pins not assigned to any of these functions are
available for generic input/output. Figure 9-10 shows the pin configuration of port A.
Pins in port A can drive one TTL load and a 30-pF capacitive load. They can also drive a darlington
transistor pair. Port A has Schmitt-trigger inputs.
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