 English |
|
|
|
|
|
|
|
| HD6433044 Datasheet, PDF (708/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer | |||
| |||
| ◁ |
ø
A23 to A0
AS
CS3
RD (read)
D15 to D0
(read)
HWR, LWR
(write)
D15 to D0
(write)
RFSH
T1
T2
tAD
tRAD1
tAS1
tRSD
tWSD
tWDS2
T3
tRAD3
tRP
tSD
tRDS
tRDH
tSD
Figure 21-16 PSRAM Bus Timing (Read/Write): Three-State Access
ø
A23 to A0
AS
CS3, HWR,
LWR, RD
RFSH
T1
T2
tRAD2
T3
tRAD3
Figure 21-17 PSRAM Bus Timing (Refresh Cycle): Three-State Access
700
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese