HD6433044 Datasheet, PDF (433/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

Section 12 Watchdog Timer
12.1 Overview
The H8/3048 Series has an on-chip watchdog timer (WDT). The WDT has two selectable
functions: it can operate as a watchdog timer to supervise system operation, or it can operate as an
interval timer. As a watchdog timer, it generates a reset signal for the chip if a system crash allows
the timer counter (TCNT) to overflow before being rewritten. In interval timer operation, an
interval timer interrupt is requested at each TCNT overflow.
12.1.1 Features
WDT features are listed below.
• Selection of eight counter clock sources
ø/2, ø/32, ø/64, ø/128, ø/256, ø/512, ø/2048, or ø/4096
• Interval timer option
• Timer counter overflow generates a reset signal or interrupt.
The reset signal is generated in watchdog timer operation. An interval timer interrupt is
generated in interval timer operation.
• Watchdog timer reset signal resets the entire chip internally, and can also be output externally.
The reset signal generated by timer counter overflow during watchdog timer operation resets
the entire chip internally. An external reset signal can be output from the RESO pin to reset
other system devices simultaneously.
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