HD6433044 Datasheet, PDF (176/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

Self-Refresh Mode: Some DRAM devices have a self-refresh function. After the SRFMD bit is
set to 1 in RFSHCR, when a transition to software standby mode occurs, the CAS and RAS
outputs go low in that order so that the DRAM self-refresh function can be used. On exit from
software standby mode, the CAS and RAS outputs both go high.
Table 7-7 shows the pin states in software standby mode. Figure 7-6 shows the signal output
timing.
Table 7-7 Pin States in Software Standby Mode (1) (PSRAME = 0, DRAME = 1)
Signal
HWR
LWR
RD
CS₃
RFSH
Software Standby Mode
SRFMD = 0
SRFMD = 1 (self-refresh mode)
CAS/WE = 0
CAS/WE = 1
CAS/WE = 0
CAS/WE = 1
High-impedance High-impedance High
Low
High-impedance High-impedance High
Low
High-impedance High-impedance Low
High
High
High
Low
Low
High
High
Low
Low
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