HD6433044 Datasheet, PDF (529/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

14.4 Usage Notes
When using the SCI as a smart card interface, note the following points.
Receive Data Sampling Timing in Smart Card Mode and Receive Margin: In smart card
mode the SCI operates on a base clock with 372 times the bit rate frequency. In receiving, the SCI
synchronizes internally with the fall of the start bit, which it samples on the base clock. Receive
data is latched at the rising edge of the 186th base clock pulse. See figure 14-10.
Internal
base clock
372 clocks
186 clocks
0
185
371 0
185
371 0
Receive data
Start
(RxD)
bit
D0
D1
Synchronization
sampling timing
Data sampling
timing
Figure 14-10 Receive Data Sampling Timing in Smart Card Mode
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