English
Language : 

HD6433044 Datasheet, PDF (263/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer
9.3.2 Register Descriptions
Table 9-3 summarizes the registers of port 2.
Table 9-3 Port 2 Registers
Address* Name
H'FFC1 Port 2 data direction register
H'FFC3 Port 2 data register
H'FFD8 Port 2 input pull-up MOS
control register
Note: * Lower 16 bits of the address.
Abbreviation
P2DDR
P2DR
P2PCR
Initial Value
R/W Modes 1 to 4 Modes 5 to 7
W H'FF
H'00
R/W H'00
H'00
R/W H'00
H'00
Port 2 Data Direction Register (P2DDR): P2DDR is an 8-bit write-only register that can select
input or output for each pin in port 2.
Bit
7
6
5
4
3
2
1
0
P27DDR P26DDR P25DDR P24DDR P23DDR P22DDR P21DDR P20DDR
Modes Initial value 1
1
1
1
1
1
1
1
1 to 4 Read/Write —
—
—
—
—
—
—
—
Modes Initial value 0
0
0
0
0
0
0
0
5 to 7 Read/Write W
W
W
W
W
W
W
W
Port 2 data direction 7 to 0
These bits select input or
output for port 2 pins
Modes 1 to 4 (Expanded Modes with On-Chip ROM Disabled): P2DDR values are fixed at 1
and cannot be modified. Port 2 functions as an address bus.
Modes 5 and 6 (Expanded Modes with On-Chip ROM Enabled): Following a reset, port 2 is
an input port. A pin in port 2 becomes an address output pin if the corresponding P2DDR bit is set
to 1, and a generic input port if this bit is cleared to 0.
Mode 7 (Single-Chip Mode): Port 2 functions as an input/output port. A pin in port 2 becomes an
output port if the corresponding P2DDR bit is set to 1, and an input port if this bit is cleared to 0.
250