HD6433044 Datasheet, PDF (506/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

Restrictions on Usage of DMAC
To have the DMAC read RDR, be sure to select the SCI receive-data-full interrupt (RXI) as the
activation source with bits DTS2 to DTS0 in DTCR.
Restrictions on Usage of the Serial Clock
When transmitting data using the serial clock as an external clock, after clearing SSR of TDRE,
maintain the space between each frame of the lead of the transmission clock (start-up edge) at five
states or more (see Figure 13-22). This condition is also needed for continuous transmission. If it
is not fulfilled, operational error will occur.
SCK
t*
t*
TDRE
TXD
X0
X1
X2
X3
X4
X5
X6
X7
Y0
Y1
Y2
Y3
Continuous transmission
Note: ^* Ensure that t ≥ 5 states.
Figure 13-22 Serial Clock Transmission (Example)
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