HD6433044 Datasheet, PDF (610/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

Sample Program for Erasing Multiple Blocks: This program uses the following registers.
R0, R6: Specifies blocks to be erased (set as explained below)
R1H: Prewrite-verify fail counter
R1L: Used to test bits 0 to 15 of R0
ER2: Specifies address where address used in prewrite and erase-verify is stored
ER3: Stores address used in prewrite and erase-verify
ER4: Stores address used in prewrite and erase-verify
ER5: Sets appropriate registers
E0, E1: Timing loop counter
E6: Erase-verify fail counter
Arbitrary blocks can be erased by setting bits in R6.
A bit map of R6 and an example setting for erasing specific blocks are shown next.
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R6
LB7 LB6 LB5 LB4 LB3 LB2 LB1 LB0 SB7 SB6 SB5 SB4 SB3 SB2 SB1 SB0
Corresponds to EBR1
Corresponds to EBR2
Example: to erase blocks LB2, SB7, and SB0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R6
LB7 LB6 LB5 LB4 LB3 LB2 LB1 LB0 SB7 SB6 SB5 SB4 SB3 SB2 SB1 SB0
Corresponds to EBR1
Corresponds to EBR2
Setting 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1
R6 is set as follows:
MOV.W #0481, R6
MOV.W R6,
@EBR1
The values of #a, #c, #d, #e, #f, #g, and #h in the program depend on the clock frequency. They
can be calculated as indicated in tables 18-14 and 18-15.
For #RAMSTR in the program, substitute the starting destination address in RAM, to be used
when this program is moved from flash memory into RAM.
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