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HD6433044 Datasheet, PDF (673/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer | |||
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Table 21-4 Bus Timing (cont)
Condition A: VCC = 2.7 V to 5.5 V, AVCC = 2.7 V to 5.5 V, VREF = 2.7 V to AVCC,
VSS = AVSS = 0 V, ø = 1 MHz to 8 MHz, Ta = â20°C to +75°C (regular
specifications), Ta = â40°C to +85°C (wide-range specifications)
Condition B: VCC = 3.15 V to 5.5 V, AVCC = 3.15 V to 5.5 V, VREF = 3.15 V to AVCC,
VSS = AVSS = 0 V, ø = 1 MHz to 13 MHz, Ta = â20°C to +75°C (regular
specifications), Ta = â40°C to +85°C (wide-range specifications)
Condition C: VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, VREF = 4.5 V to AVCC,
VSS = AVSS = 0 V, ø = 1 MHz to 18 MHz, Ta = â20°C to +75°C (regular
specifications), Ta = â40°C to +85°C (wide-range specifications)
Condition A Condition B
Condition C
8 MHz
13 MHz
16 MHz
18 MHz
Item
Symbol Min Max Min Max Min Max Min Max
Write data delay time tWDD â 75 â 75 â 60 â 55
Write data setup time 1 tWDS1 60 â 20 â 15 â 10 â
Write data setup time 2 tWDS2 5
â â10 â â5 â â10 â
Write data hold time tWDH 25 â 15 â 20 â 20 â
Read data access
time 1
tACC1* â 120 â 60 â 60 â 50
Read data access
time 2
tACC2* â 240 â 140 â 120 â 105
Read data access
time 3
tACC3* â 70 â 30 â 30 â 20
Read data access
time 4
tACC4* â 180 â 100 â 95 â 80
Precharge time
tPCH* 85 â 55 â 45 â 40 â
Wait setup time
tWTS
40 â 40 â 25 â 25 â
Wait hold time
tWTH
10 â 10 â 5
â5
â
Bus request setup ime tBRQS 40 â 40 â 40 â 40 â
Bus acknowledge
delay time 1
tBACD1 â 60 â 50 â 30 â 30
Bus acknowledge
delay time 2
tBACD2 â 60 â 50 â 30 â 30
Bus-floating time
tBZD
Note is on next page.
â 70 â 70 â 40 â 40
Test
Unit Conditions
ns Figure 21-7,
Figure 21-8
ns Figure 21-9
ns Figure 21-21
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