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HD6433044 Datasheet, PDF (677/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer
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Table 21-6 Control Signal Timing
Condition A: VCC = 2.7 V to 5.5 V, AVCC = 2.7 V to 5.5 V, VREF = 2.7 V to AVCC,
VSS = AVSS = 0 V, ø = 1 MHz to 8 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition B: VCC = 3.15 V to 5.5 V, AVCC = 3.15 V to 5.5 V, VREF = 3.15 V to AVCC,
VSS = AVSS = 0 V, ø = 1 MHz to 13 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition C: VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, VREF = 4.5 V to AVCC,
VSS = AVSS = 0 V, ø = 1 MHz to 18 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition A Condition B
Condition C
8 MHz
13 MHz
16 MHz
18 MHz
Item
Symbol Min Max Min Max Min Max Min Max
RES setup time
RES pulse width
Mode programming
setup time
tRESS
tRESW
tMDS
200 —
10 —
200 —
200 —
10 —
200 —
200 —
10 —
200 —
200 —
10 —
200 —
RESO output delay
time
tRESD — 100 — 100 — 100 — 100
RESO output pulse
width
tRESOW 132 — 132 — 132 — 132 —
NMI setup time
(NMI, IRQ5 to IRQ0)
NMI hold time
(NMI, IRQ5 to IRQ0)
Interrupt pulse width
(NMI, IRQ2 to IRQ0
when exiting software
standby mode)
tNMIS
tNMIH
tNMIW
200 —
10 —
200 —
200 —
10 —
200 —
150 —
10 —
200 —
150 —
10 —
200 —
Clock oscillator settling tOSC1 20 — 20 — 20 — 20 —
time at reset (crystal)
Clock oscillator settling tOSC2 7
—7
—7
—7
—
time in software standby
(crystal)
Test
Unit Conditions
ns Figure 21-18
tCYC
ns
ns Figure 21-19
tCYC
ns Figure 21-20
ms Figure 21-22
ms Figure 20-1
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