HD6433044 Datasheet, PDF (585/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

Bits 5 to 4—Reserved: Read-only bits, always read as 0.
Bit 3—Erase-Verify Mode (EV)^*1: Selects transition to or exit from erase-verify mode.
Bit 3
EV
0
1
Description
Exit from erase-verify mode
Transition to erase-verify mode
(Initial value)
Bit 2—Erase-Verify Mode (PV)^*1: Selects transition to or exit from program-verify mode.
Bit 2
PV
0
1
Description
Exit from program-verify mode
Transition to program-verify mode
(Initial value)
Bit 1—Erase Mode (E)^{*1, *2}: Selects transition to or exit from erase mode.
Bit 1
E
0
1
Description
Exit from erase mode
Transition to erase mode
(Initial value)
Bit 0—Program Mode (P)^{*1, *2}: Selects transition to or exit from program mode.
Bit 0
P
0
1
Description
Exit from program mode
Transition to program mode
(Initial value)
Notes: 1. Do not set two or more of these bits simultaneously. Do not turn off power supply
(V_CC–V_PP) while a bit is set.
2. For each bit setting procedure, follow the algorithm described in section 18.7,
Programming and Erasing Flash Memory. For the notes on programming and erasing,
refer to section 18.10, Flash Memory Programming and Erasing Precautions.
Particularly, be sure to set the watchdog timer beforehand to prevent program runaway,
when the E or P bit is set.
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