HD6433044 Datasheet, PDF (586/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

18.5.2 Erase Block Register 1
Erase block register 1 (EBR1) is an eight-bit register that designates large flash-memory blocks
for programming and erasure. EBR1 is initialized to H'00 by a reset, in the standby modes, when
12 V is applied to V_PP while the V_PPE bit is 0, and when 12 V is not applied to V_PP. When a bit
in EBR1 is set to 1, the corresponding block is selected and can be programmed and erased.
Figure 18-8 shows a block map.
Bit
Initial value^*
R/W
7
LB7
0
R/W^*
6
LB6
0
R/W^*
5
LB5
0
R/W^*
4
LB4
0
R/W^*
3
LB3
0
R/W^*
2
LB2
0
R/W^*
1
LB1
0
R/W^*
0
LB0
0
R/W^*
Note: * The initial value is H'00 in modes 5, 6, and 7 (on-chip flash memory enabled). In modes
1, 2, 3, and 4 (on-chip flash memory disabled), this register cannot be modified and is
always read as H'FF.
Bits 7 to 0—Large Block 7 to 0 (LB7 to LB0): These bits select large blocks (LB7 to LB0) to be
programmed and erased.
Bits 7 to 0
LB7 to LB0
0
1
Description
Block LB7 to LB0 is not selected
Block LB7 to LB0 is selected
(Initial value)
577