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HD6433044 Datasheet, PDF (596/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer
8. Regarding 12 V application to the VPP and MD2 pins, insure that peak overshoot does not
exceed the maximum rating of 13 V. Also, be sure to connect bypass capacitors to the Vpp
and MD2 pins*1.
Notes:
1. Mode pin input must satisfy the mode programming setup time (tMDS) with respect to
the reset release timing. When 12 V is applied to or disconnected from the MD2 pin, a
delay occurs in the fall and rise waveforms due to the influence of the pull-up/pull-
down resistor connected to the MD2 pin, etc. For reset release timing, therefore, this
delay must be confirmed with the actual waveform on the board.
2. For notes on applying and cutting VPP, refer to 18.10, section (4) of “Programming
and Erasing Flash Memory.”
18.6.2 User Program Mode
When set to user program mode, the H8/3048F can erase and program its flash memory by
executing a user program. On-board updates of the on-chip flash memory can be carried out by
providing on-board circuits for supplying VPP and data, and storing an update program in part of
the program area.
To select user program mode, select a mode that enables the on-chip ROM (mode 5, 6, or 7) and
apply 12 V to the VPP pin. In this mode, the on-chip peripheral modules operate as they normally
would in mode 5, 6, or 7, except for the flash memory. A watchdog timer overflow, however,
cannot output a reset signal while 12 V is applied to VPP. The watchdog timer’s reset output
enable bit (RSTOE) should not be set to 1.
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