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HD6433044 Datasheet, PDF (696/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer
Table 21-15 Timing of On-Chip Supporting Modules (cont)
Condition A: VCC = 2.7 V to 5.5 V, AVCC = 2.7 V to 5.5 V, VREF = 2.7 V to AVCC,
VSS = AVSS = 0 V, ø = 1 MHz to 8 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition C: VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, VREF = 4.5 V to AVCC,
VSS = AVSS = 0 V, ø = 1 MHz to 16 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Item
SCI
Transmit data
delay time
Receive data
setup time
(synchronous)
Receive data
hold time
(synchronous)
Clock input
Clock output
Symbol
tTXD
Condition A
8 MHz
Min Max
—
100
Condition C
16 MHz
Min Max Unit
—
100 ns
Test
Conditions
Figure 21-27
tRXS
100 —
100 —
tRXH
tRXH
100 —
0
—
100 —
0
—
Ports
and
TPC
Output data
delay time
Input data
setup time
Input data
hold time
tPWD
tPRS
tPRH
—
100 —
100 ns
Figure 21-23
50
—
50
—
50
—
50
—
H8/3048 Series
output pin
C
5V
C = 90 pF: ports 4, 5, 6, 8, A (19 to 0), D (15 to 8), ø
RL
C = 30 pF: ports 9, A, B, RESO
RL = 2.4 k Ω
RH = 12 kΩ
RH
Input/output timing measurement levels
• Low: 0.8 V
• High: 2.0 V
Figure 21-6 Output Load Circuit
688