HD6433044 Datasheet, PDF (598/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

18.7 Programming and Erasing Flash Memory
The H8/3048F’s on-chip flash memory is programmed and erased by software, using the CPU.
The flash memory operating modes and state transition diagram are shown in figure 18-14.
Program/erase modes comprise program mode, erase mode, program-verify mode, erase-verify
mode, and prewrite-verify mode. Transitions to these modes can be made by setting the P, E, PV,
and EV bits in the flash memory control register (FLMCR). Transition to the prewrite-verify
mode can also be made by clearing all the bits in FLMCR.
The flash memory cannot be read while being programmed or erased. The program that controls
the programming and erasing of the flash memory must be stored and executed in on-chip RAM
or in external memory. A description of each mode is given below, with recommended flowcharts
and sample programs for programming and erasing. High-reliability programming and erasing
algorithms are used, which double the programming or erase processing time for each step.
Section 18.10, Flash Memory Programming and Erasing Precautions, gives further notes on
programming and erasing.
Normal ROM access mode
V_PP= 12 V and
V_PPE= 1
V_PPE= 0
V_PP off
Prewrite-verify mode
P= 1
P= 0
Program mode
E= 1
E= 0
PV= 1
PV= 0
EV= 0
EV= 1
Erase mode
Program-verify
mode
Erase-verify
mode
Flash memory
program/erase
operations
Note: Do not perform simultaneous setting/clearing of the P, E, PV, and EV bits.
Figure 18-14 Flash Memory Program/Erase Operating Mode State Transition Diagram
589