HD6433044 Datasheet, PDF (273/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

Port 5 Data Direction Register (P5DDR): P5DDR is an 8-bit write-only register that can select
input or output for each pin in port 5.
Bit
7
6
5
4
3
2
1
0
—
—
—
— P5₃DDR P5₂DDR P5₁DDR P5₀DDR
Modes ^{Initial value 1}
1
1
1
1
1
1
1
1 to 4 _{Read/Write —}
—
—
—
—
—
—
—
Modes ^{Initial value 1}
1
1
1
0
0
0
0
5 to 7 _{Read/Write —}
—
—
—
W
W
W
W
Reserved bits
Port 5 data direction 3 to 0
These bits select input or
output for port 5 pins
Modes 1 to 4 (Expanded Modes with On-Chip ROM Disabled): P5DDR values are fixed at 1
and cannot be modified. Port 5 functions as an address bus. The reserved bits (bits 7 to 4) are also
fixed at 1.
Modes 5 and 6 (Expanded Modes with On-Chip ROM Enabled): Following a reset, port 5 is an
input port. A pin in port 5 becomes an address output pin if the corresponding P5DDR bit is set to
1, and an input port if this bit is cleared to 0.
Mode 7 (Single-Chip Mode): Port 5 functions as an input/output port. A pin in port 5 becomes an
output port if the corresponding P5DDR bit is set to 1, and an input port if this bit is cleared to 0.
P5DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P5DDR is initialized to H'F0 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting, so if a P5DDR bit is set to 1, the corresponding pin maintains its
output state in software standby mode.
Port 5 Data Register (P5DR): P5DR is an 8-bit readable/writable register that stores output data for
pins P5₃ to P5₀. When a bit in P5DDR is set to 1, if port 5 is read the value of the corresponding P5DR
bit is returned. When a bit in P5DDR is cleared to 0, if port 5 is read the corresponding pin level is read.
Bit
7
6
5
4
3
2
1
0
—
—
—
—
P5 ₃
P5 ₂
P5 ₁
P5 ₀
Initial value
1
1
1
1
0
0
0
0
Read/Write
—
—
—
—
R/W
R/W
R/W
R/W
Reserved bits
Port 5 data 3 to 0
These bits store data
for port 5 pins
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