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HD6433044 Datasheet, PDF (694/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer
Table 21-14 Control Signal Timing
Condition A: VCC = 2.7 V to 5.5 V, AVCC = 2.7 V to 5.5 V, VREF = 2.7 V to AVCC,
VSS = AVSS = 0 V, ø = 1 MHz to 8 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition C: VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, VREF = 4.5 V to AVCC,
VSS = AVSS = 0 V, ø = 1 MHz to 16 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Item
RES setup time
RES pulse width
Mode programming
setup time
RESO output delay
time
RESO output pulse width
NMI setup time
(NMI, IRQ5 to IRQ0)
NMI hold time
(NMI, IRQ5 to IRQ0)
Interrupt pulse width
(NMI, IRQ2 to IRQ0
when exiting software
standby mode)
Clock oscillator settling
time at reset (crystal)
Clock oscillator settling
time in software standby
(crystal)
Symbol
tRESS
tRESW
tMDS
Condition A
8 MHz
Min
Max
200
—
10
—
200
—
tRESD
—
100
tRESOW
132
—
tNMIS
200
—
tNMIH
10
—
tNMIW
200
—
Condition C
16 MHz
Min
Max
200
—
10
—
200
—
Unit
ns
tCYC
ns
Test
Conditions
Figure 21-18
—
100
ns
Figure 21-19
132
—
150
—
tCYC
ns
Figure 21-20
10
—
200
—
tOSC1
20
—
tOSC2
7
—
20
—
ms
Figure 21-22
7
—
ms
Figure 20-1
686