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HD6433044 Datasheet, PDF (549/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer
15.5 Interrupts
The A/D converter generates an interrupt (ADI) at the end of A/D conversion. The ADI interrupt
request can be enabled or disabled by the ADIE bit in ADCSR.
15.6 Usage Notes
When using the A/D converter, note the following points:
1. Analog Input Voltage Range: During A/D conversion, the voltages input to the analog input
pins should be in the range AVSS ≤ ANn ≤ VREF.
2. Relationships of AVCC and AVSS to VCC and VSS: AVCC, AVSS, VCC, and VSS should be
related as follows: AVSS = VSS. AVCC and AVSS must not be left open, even if the A/D
converter is not used.
3. VREF Programming Range: The reference voltage input at the VREF pin should be in the
range VREF ≤ AVCC.
4. Analog voltage
When using an A/D converter, make the following voltage settings.
(1) VCC ≥ AVCC - 0.3V
(2) AVCC ≥ VREF ≥ ANn ≥ AVSS = VSS
(N = 0 to 7)
Note: Restriction for the ZTATTM version only; The S Mask version of ZTATTM, the Flash
Memory version and Mask ROM version can be used regularly without restriction.
Failure to observe points 1, 2, 3, and 4 above may degrade chip reliability.
5. Note on Board Design: In board layout, separate the digital circuits from the analog circuits
as much as possible. Particularly avoid layouts in which the signal lines of digital circuits
cross or closely approach the signal lines of analog circuits. Induction and other effects may
cause the analog circuits to operate incorrectly, or may adversely affect the accuracy of A/D
conversion.
The analog input signals (AN0 to AN7), analog reference voltage (VREF), and analog supply
voltage (AVCC) must be separated from digital circuits by the analog ground (AVSS). The
analog ground (AVSS) should be connected to a stable digital ground (VSS) at one point on
the board.
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