HD6433044 Datasheet, PDF (541/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

15.2.3 A/D Control Register (ADCR)
Bit
7
6
5
4
3
2
TRGE
—
—
—
—
—
Initial value
0
1
1
1
1
1
Read/Write
R/W
—
—
—
—
—
Reserved bits
Trigger enable
Enables or disables external triggering of A/D conversion
1
0
—
—
1
1
—
—
ADCR is an 8-bit readable/writable register that enables or disables external triggering of A/D
conversion. ADCR is initialized to H'7F by a reset and in standby mode.
Bit 7—Trigger Enable (TRGE): Enables or disables external triggering of A/D conversion.
Bit 7
TRGE
0
1
Description
A/D conversion cannot be externally triggered
(Initial value)
A/D conversion starts at the falling edge of the external trigger signal (ADTRG)
Bits 6 to 0—Reserved: Read-only bits, always read as 1.
531