HD6433044 Datasheet, PDF (262/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

9.3 Port 2
9.3.1 Overview
Port 2 is an 8-bit input/output port with the pin configuration shown in figure 9-2. The pin
functions differ according to the operating mode.
In modes 1 to 4 (expanded modes with on-chip ROM disabled), port 2 consists of address bus
output pins (A₁₅ to A₈). In modes 5 and 6 (expanded modes with on-chip ROM enabled), settings
in the port 2 data direction register (P2DDR) can designate pins for address bus output (A₁₅ to A₈)
or generic input. In mode 7 (single-chip mode), port 2 is a generic input/output port.
When DRAM is connected to area 3, A₉ and A₈ output row and column addresses in read and
write cycles. For details see section 7, Refresh Controller.
Port 2 has software-programmable built-in pull-up MOS. Pins in port 2 can drive one TTL load
and a 90-pF capacitive load. They can also drive a darlington transistor pair.
Port 2
Port 2 pins Modes 1 to 4 Modes 5 and 6
Mode 7
P2₇ /A₁₅
P2₆ /A₁₄
P2₅ /A₁₃
P2₄ /A₁₂
P2₃ /A₁₁
P2₂ /A₁₀
P2₁ /A₉
P2₀ /A₈
A₁₅ (output)
A₁₄ (output)
A₁₃ (output)
A₁₂ (output)
A₁₁ (output)
A₁₀ (output)
A₉ (output)
A₈ (output)
P2₇ (input)/A₁₅ (output) P2₇ (input/output)
P2₆ (input)/A₁₄ (output) P2₆ (input/output)
P2₅ (input)/A₁₃ (output) P2₅ (input/output)
P2₄ (input)/A₁₂ (output) P2₄ (input/output)
P2₃ (input)/A₁₁ (output) P2₃ (input/output)
P2₂ (input)/A₁₀ (output) P2₂ (input/output)
P2₁ (input)/A₉ (output) P2₁ (input/output)
P2₀ (input)/A₈ (output) P2₀ (input/output)
Figure 9-2 Port 2 Pin Configuration
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