HD6433044 Datasheet, PDF (380/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

• Complementary PWM mode
The buffer register value is transferred to the general register when TCNT3 and TCNT4
change counting direction. This occurs at the following two times:
— When TCNT3 compare matches GRA3
— When TCNT4 underflows
• Reset-synchronized PWM mode
The buffer register value is transferred to the general register at compare match A3.
Sample Buffering Setup Procedure: Figure 10-48 shows a sample buffering setup procedure.
Buffering
Select general register functions 1 1. Set TIOR to select the output compare or input
capture function of the general registers.
2. Set bits BFA3, BFA4, BFB3, and BFB4 in TFCR
Set buffer bits
2
to select buffering of the required general registers.
3. Set the STR bits to 1 in TSTR to start the timer
counters.
Start counters
3
Buffered operation
Figure 10-48 Buffering Setup Procedure (Example)
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