HD6433044 Datasheet, PDF (691/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

21.3.2 AC Characteristics
Bus timing parameters are listed in table 21-12. Refresh controller bus timing parameters are
listed in table 21-13. Control signal timing parameters are listed in table 21-14. Timing parameters
of the on-chip supporting modules are listed in table 21-15.
Table 21-12 Bus Timing (1)
Condition A: V_CC = 2.7 V to 5.5 V, AV_CC = 2.7 V to 5.5 V, V_REF = 2.7 V to AV_CC,
V_SS = AV_SS = 0 V, ø = 1 MHz to 8 MHz, T_a = –20°C to +75°C (regular
specifications), T_a = –40°C to +85°C (wide-range specifications)
Condition C: V_CC = 5.0 V ± 10%, AV_CC = 5.0 V ± 10%, V_REF = 4.5 V to AV_CC,
V_SS = AV_SS = 0 V, ø = 1 MHz to 16 MHz, T_a = –20°C to +75°C (regular
specifications), T_a = –40°C to +85°C (wide-range specifications)
Item
Clock cycle time
Clock pulse low width
Clock pulse high width
Clock rise time
Clock fall time
Address delay time
Address hold time
Address strobe delay time
Write strobe delay time
Strobe delay time
Write data strobe pulse width 1
Write data strobe pulse width 2
Address setup time 1
Address setup time 2
Read data setup time
Read data hold time
Symbol
t_CYC
t_CL
t_CH
t_CR
t_CF
t_AD
t_AH
t_ASD
t_WSD
t_SD
t_WSW1*
t_WSW2*
t_AS1
t_AS2
t_RDS
t_RDH
Condition A
8 MHz
Min
Max
125
1000
40
—
40
—
—
20
—
20
—
60
25
—
—
60
—
60
—
60
85
—
150
—
20
—
80
—
50
—
0
—
Condition C
16 MHz
Min
Max
62.5 1000
20
—
20
—
—
10
—
10
—
30
10
—
—
30
—
30
—
30
35
—
65
—
10
—
40
—
20
—
0
—
Unit
ns
Test
Conditions
Figure 21-7
Figure 21-8
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