HD6433044 Datasheet, PDF (233/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

If M (1 to 255) is the size of the block transferred at each request and N (1 to 65,536) is the
number of blocks to be transferred, then ETCRAH and ETCRAL should initially be set to M and
ETCRB should initially be set to N.
Figure 8-10 illustrates how block transfer mode operates. In this figure, bit TMS is cleared to 0,
meaning the block area is the destination.
T_A
Block 1
B_A
Transfer
Block area
Address T _B
Address B _B
Block 2
M bytes or words are
transferred per request
Block N
Legend
L _A = initial setting of MARA
L _B = initial setting of MARB
M = initial setting of ETCRAH and ETCRAL
N = initial setting of ETCRB
T_A
B_A
=
=
L_A
L_A +
SAIDE
•
(–1) ^SAID
•
(2 ^DTSZ
•
M
–
1)
T_B = L_B
B _B = L _B + DAIDE • (–1)^DAID • (2^DTSZ • M – 1)
Figure 8-10 Operation in Block Transfer Mode
219