HD6433044 Datasheet, PDF (605/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

Prewrite Flowchart
Start
Address = top address
Set V_PPE bit
( V_PPE bit = 1 in FLMCR)
Wait (z) µs
Set erase block register
(set bit of block to be erased to 1)
n=1
Wait initial value setting x = 15 µs
Write H'00 to flash memory
(flash memory latches
write address and write data)^*1
Enable watchdog timer^*2
Select program mode
(set P bit to 1 in FLMCR)
Wait (x) µs
Clear P bit
Disable watchdog timer
Wait (t_VS1) µs
Address + 1 → address
Notes: 1. Use a byte transfer instruction.
2. Set the watchdog timer overflow
interval by setting CKS2 = 0,
CKS1 = 0 and CKS0 = 0.
3. In prewrite-verify mode P, E, PV,
and EV are all cleared to 0 and
12 V is applied to V_PP. Use a byte
transfer instruction.
4. t_VS1: 4 µs
z: 5 to 10 µs
N: 6 (set N so that total
Programming ends
programming time does not
exceed 1 ms)
Prewrite verify^*3
(read data = H'00?)
OK
No good
No
n ≥ N?
Yes
Clear erase block register
(clear bit of block to be erased to 0)
Last address?
No
Clear V_PPE bit
Programming error
Yes
Clear erase block register
(clear bit of block to be erased to 0)
Clear V_PPE bit
End of prewrite
n+1→n
Double
the programming
time (x × 2 → x)
Figure 18-17 Prewrite Flowchart
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