HD6433044 Datasheet, PDF (145/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

ø
Address bus
CS _n
AS
RD
Read
access
D₁₅ to D₈
D₇ to D ₀
HWR
Write
access
LWR
D₁₅ to D₈
D₇ to D ₀
Bus cycle
T₁
T₂
Odd external address in area n
High
Invalid
Valid
Undetermined data
Valid
Note: n = 7 to 0
Figure 6-10 Bus Control Signal Timing for 16-Bit, Two-State-Access Area (2)
(Byte Access to Odd Address)
131