HD6433044 Datasheet, PDF (514/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

14.2.4 Serial Control Register (SCR)
Bits 1 and 0 have different functions in smart card interface mode. However, this function does not
exist in the flash memory version.
Bit
Initial value
Read/Write
7
TIE
0
R/W
6
RIE
0
R/W
5
TE
0
R/W
4
RE
0
R/W
3
MPIE
0
R/W
2
TEIE
0
R/W
1
CKE1
0
R/W
0
CKE0
0
R/W
Bits 7 to 2—Operate in the same way as for the normal SCI.
For details, see section 13.2.6, Serial Control Register (SCR).
Bits 1 and 0—Clock Enable (CKE1, CKE0): Setting enable or disable for the SCI clock
selection and clock output from the SCK pin. In smart card interface mode, it is possible to switch
between enabling and disabling of the normal clock output, and specify a fixed high level or fixed
low level for the clock output.
SMR
Bit 7
GM
0
0
1
1
1
1
SCR
Bit 1 Bit 0
CKE1 CKE0
0
0
0
1
0
0
0
1
1
0
1
1
Description
The internal clock/SCK0 pin functions as an I/O port
(Initial value)
The internal clock/SCK0 pin functions as the clock output
The internal clock/SCK0 pin is fixed at low-level output
The internal clock/SCK0 pin functions as the clock output
The internal clock/SCK0 pin is fixed at high-level output
The internal clock/SCK0 pin functions as the clock output
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