HD6433044 Datasheet, PDF (634/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

(b) The V_PP bit in the flash memory control register (FLMCR) is set or cleared when the V_PPE
bit in FLMCR is set or cleared while a voltage of 12.0 ± 0.6 V is being applied to the V_PP pin.
After the V_PPE bit is set, it becomes possible to write the erase block registers (EBR1 and EBR2)
and the EV, PV, E, and P bits in FLMCR. Accordingly, program or erase flash memory 5 to 10 µs
after the V_PPE bit is set. V_PP should be turned off only when the P, E and V_PPE bits in FLMCR
are cleared. Be sure that these bits are not set by mistaken access to FLMCR.
t_VPS*
Programming/
erasing
possible
t_FRS
ø
tosc1
2.7 to 5.5 V
V_CC
min 0 µs
V_PP
MD2
RES
0 to Vcc V
12±0.6 V
12±0.6 V
0 to Vcc V
min 0µs
V_PPE bit
min 0 µs
t_MDS
VppE
set
min 10 ø
VppE
cleared
0 to Vcc V
0 to Vcc V
Period during which flash memory access is prohibited
Period during which flash memory can be rewritten
(Execution of program in flash memory prohibited, and data reads other than verify
operations prohibited)
* t_VPS: 5 to 10µs
Figure 18-28 Power-On and Power-Off Timing (Boot Mode)
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