HD6433044 Datasheet, PDF (282/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

P8DDR is initialized to H'E0 or H'F0 by a reset and in hardware standby mode. The reset value
depends on the operating mode. In software standby mode P8DDR retains its previous setting. If a
P8DDR bit is set to 1, the corresponding pin maintains its output state in software standby mode.
Port 8 Data Register (P8DR): P8DR is an 8-bit readable/writable register that stores output data
for pins P8₄ to P8₀. When a bit in P8DDR is set to 1, if port 8 is read the value of the
corresponding P8DR bit is returned. When a bit in P8DDR is cleared to 0, if port 8 is read the
corresponding pin level is read.
Bit
7
6
5
4
3
2
1
0
—
—
—
P8 ₄
P8 ₃
P8 ₂
P8 ₁
P8 ₀
Initial value
1
1
1
0
0
0
0
0
Read/Write
—
—
—
R/W R/W
R/W
R/W R/W
Reserved bits
Port 8 data 4 to 0
These bits store data
for port 8 pins
Bits 7 to 5 are reserved. They cannot be modified and always are read as 1.
P8DR is initialized to H'E0 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
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