HD6433044 Datasheet, PDF (590/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

Bits 6 to 4—Reserved: Read-only bits, always read as 1.
Bit 3—RAM Select (RAMS): Is used with bits 2 to 0 to reassign an area to RAM (see table 18-
11). When bit 3 is set, all flash-memory blocks are protected from programming and erasing,
regardless of the values of bits 2 to 0.
It is initialized by a reset and in hardware standby mode. It is not initialized in software standby
mode.
Bits 2 to 0—RAM2 to RAM0: These bits are used with bit 3 to reassign an area to RAM (see
table 18-11). They are initialized by a reset and in hardware standby mode. They are not initialized
in software standby mode.
Table 18-11 RAM Area Reassignment
RAM Area
H'FFF000 to H'FFF1FF
H'01F000 to H'01F1FF
H'01F200 to H'01F3FF
H'01F400 to H'01F5FF
H'01F600 to H'01F7FF
H'01F800 to H'01F9FF
H'01FA00 to H'01FBFF
H'01FC00 to H'01FDFF
H'01FE00 to H'01FFFF
Bit 3
RAMS
0
1
1
1
1
1
1
1
1
Bit 2
RAM2
0/1
0
0
0
0
1
1
1
1
Bit 1
RAM1
0/1
0
0
1
1
0
0
1
1
Bit 0
RAM0
0/1
0
1
0
1
0
1
0
1
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