HD6433044 Datasheet, PDF (140/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

8-Bit, Two-State-Access Areas: Figure 6-5 shows the timing of bus control signals for an 8-bit,
two-state-access area. The upper address bus (D₁₅ to D₈) is used to access these areas. The LWR
pin is always high. Wait states cannot be inserted.
ø
Address bus
CS _n
AS
RD
Read
access
D₁₅ to D₈
D₇ to D ₀
HWR
Write
access
LWR
D₁₅ to D₈
D₇ to D ₀
Bus cycle
T₁
T₂
External address in area n
Valid
Invalid
High
Valid
Undetermined data
Note: n = 7 to 0
Figure 6-5 Bus Control Signal Timing for 8-Bit, Two-State-Access Area
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