HD6433044 Datasheet, PDF (613/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

; Execute erase-verify
EVR: MOV.W R6,
R0
SUB.W R1,
R1
; R0: EBR1/EBR2
; R1: used to test R1-th bit in R0
; #RAMSTR is starting destination address to which program is transferred in RAM
MOV.L #RAMSTR:32, ER2 ; Starting transfer destination address (RAM)
ADD.L
#ERVADR:32, ER2 ; #RAMSTR + #ERVADR → ER2
SUB.L #START:32, ER2 ; ER2: address of data area used in RAM
MOV.B
MOV.B
#48,
R5H,
R5H
;
@FLMCR:8 ; Set EV bit
MOV.W
LOOPEV: DEC.W
BPL
#e ,
R5
#1,
R5
LOOPEV
; R5: set erase-verify loop counter
; Program
; Wait
EBRTST: CMP.B
BEQ
CMP.B
BCC
BTST
BNE
BRA
BC1: BTST
BNE
#10,
R1L
HANTEI
#08,
R1L
BC1
R1L,
R0H
ERSEVF
ADD01
R1L,
R0L
ERSEVF
; R1L = #10?
; If finished checking all R0 bits, branch to HANTEI
;
;
;Test R1-th bit in R0H (EBR1)
;
;
; Test R1-th bit in R0L (EBR2)
; If R1-th bit in R0 is 1, branch to ERSEVF
ADD01: INC.B
MOV.L
BRA
R1L
@ER2+, ER3
EBRTST
; R1L + 1 → R1L
; Dummy-increment R2
;
ERSEVF: MOV.L
MOV.L
@ER2+, ER3
@ER2, ER4
; ER3: top address of block to be erase-verified
; ER4: top address of next block
EVR2: MOV.B
MOV.B
MOV.W
LOOPDW: DEC.W
BPL
MOV.B
CMP.B
BNE
CMP.L
BNE
#FF,
R5H,
#h ,
#1,
LOOPDW
@ER3+,
#FF,
ADD02
ER4,
EVR2
R5H
@ER3
R5
R5
R5L
R5L
ER3
;
; Dummy write
; R5: erase-verify loop counter
;
; Wait
; Read
; Read data = #FF?
; If read data ≠ #FF, branch to ADD02
; Last address in block?
; If not last address in block, branch to EVR2
BC2:
ADD02:
CMP.B
BCC
BCLR
BRA
BCLR
INC.B
BRA
#08,
R1L
BC2
R1L,
R0H
ADD02
R1L,
R0L
R1L
EBRTST
;
;
; Clear R1L-th bit in R0H (EBR1)
;
; Clear R1L-th bit in R0L (EBR2)
; R1L + 1 → R1L
; Erase-verify next erased block
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